(1) Technical Field
This invention relates to electronic circuitry, and more particularly to a self-activating adjustable threshold power limiter circuit.
(2) Background
Limiter circuits are used in electronic systems to limit power, voltage, or current to protect electrically connected “downstream” electronic devices from being damaged by excessive power, voltage, or current from a source, which may be an “upstream” power source, signal source, antenna, device being tested, etc. For example, FIG. 1 is a block diagram of a prior art limiter 100 electrically connected to limit the power Ps from a source 102 delivered to a receiver 104 so as not to exceed a set output power level Po. FIG. 2 is a graph showing a typical Ps-Po characteristic curve of the limiter of FIG. 1. At normal signal levels, the output Po of the limiter 100 linearly tracks the input Ps from the source 102. However, at a designed threshold signal point 200, the output Po of the limiter 100 is significantly curtailed as the input Ps value increases above the threshold signal point 200.
Limiters can be electrically connected to other circuitry in a variety of ways. For example, FIG. 3A is a block diagram showing a 1-port network form of a prior art limiter 100 having an input connection 302 and a circuit ground connection 304. FIG. 3B is a block diagram showing a 2-port network form of a prior art limiter 100 having an input connection 310, an output connection 312, and a circuit ground connection 304. Alternatively, instead of being grounded, node 304 can simply be connected to a different circuit path for power transfer.
A number of different circuit configurations have been used as limiters. FIG. 4 is a circuit diagram of a prior art limiter 100 comprising two back-to-back diodes 400 (typically PIN diodes or Shottky diodes), shown electrically coupled to a signal line between a source 402 and a receiver 404. This type of circuit does not allow for an adjustable limiting threshold and has poor linearity. Further, fast PIN diodes are not available in certain semiconductor implementation processes, such as standard bulk silicon, silicon-on-insulator (SOI), and silicon-on-sapphire (SOS) processes, and thus are not available for integration with other circuitry.
FIG. 5A is a circuit diagram of a prior art limiter 100 comprising a power/amplitude detector 500 electrically coupled to the gate node of a field effect transistor (e.g., a MOSFET) 502 configure as a switchable shunt element. The detector 500 monitors the voltage amplitude or power of a signal line 506 from a source 508 to a receiver 510. If the power/amplitude exceeds a set threshold, the detector 500 applies a control voltage to switch on the transistor 502, which is electrically coupled between the signal line 506 and circuit ground. When the transistor 502 is switched to “on”, the signal line 506 is shunted to ground, thus limiting the signal applied to the input of the receiver 510.
FIG. 5B is a circuit diagram of a prior art limiter 100 comprising a power/amplitude detector 500 electrically coupled to the gate node of a field effect transistor (e.g., a MOSFET) 504 configured as a single-pole single-throw switch. The detector 500 monitors the voltage amplitude or power of a signal line 506 from a source 508 to a receiver 510. If the power/amplitude exceeds a set threshold, the detector 500 applies a control voltage to switch off the transistor 504, which is electrically coupled in series with the signal line 506. When the transistor 504 is switched off, the signal line 506 is forced to a non-conductive state, thus decoupling the source 508 from the receiver 510 and thereby cutting off the signal applied to the input of the receiver 510.
The power/amplitude detector types of limiter circuits have a relatively long response time constrained by the detector implementation, which restricts their use in applications that demand an effectively instant limiting effect.
Accordingly, there is a need for a limiter having a fast response time, good linearity, and an adjustable limiting threshold. It would also be quite useful if such a limiter could be configured to handle high power, and was easy to fabricate and to integrate with other circuitry. These and other advantages are achieved by the present invention.